User-configurable Virtex-5 FPGA, 110k Logic Cells
Manufacturer's part number :
Acromag's XMC-VLX mezzanine modules feature a configurable Xilinx® Virtex™-5 FPGA enhanced with multiple high-speed memory buffers and a high-throughput PCIe interface. Field I/O interfaces to the FPGA via the rear J4/P4 connector and/or with optional front mezzanine plug-in I/O modules. The result is a powerful and flexible I/O processor module that is capable of executing your custom instruction sets and algorithms.
Three models provide a choice of logic-optimized FPGAs to match your performance requirements. Although there is no limit to the uses for these boards, several applications are ideal. Typical uses include hardware simulation, military servers, communications, in-circuit diagnostics, signal intelligence, and image processing.
64 I/O lines are accessible through the rear (J4) connector. Additional I/O processing is supported on a separate mezzanine card that plugs into the FPGA base board. A variety of these external I/O cards are available to interface for your analog and digital I/O signals.
Large, high-speed memory banks provide efficient data handling. Generous DDR2 SDRAM buffers store captured data prior to FPGA processing.
Afterward, data is moved to dual-port SRAM for high-speed DMA transfer to the bus or CPU. Our high-bandwidth PCIe interface ensures fast data throughput.
Take advantage of the conduction-cooled design for use in hostile environments. Conduction efficiently dissipates heat if there is inadequate cooling air flow. Optional extended temperature models operate reliably from -40 to 85°C.
View our wide range of PMC / XMC products
View our portfolio of Embedded computing products
See all products from our supplier Acromag
Quote and availability
Ask our experts
- Reconfigurable Xilinx Virtex-5 FPGA
- PCIe bus 4-lane Gen 1 interface
- Supports both front and rear I/O connections
- 64 I/O or 32 LVDS lines direct to FPGA via rear (J4) connector
- Plug-in I/O extension modules are available for the front mezzanine
- FPGA code loads from the PCIe bus or from flash memory
- 1M x 64-bit dual-ported SRAM provides direct links from the PCIe bus and to the FPGA
- 32M x 32-bit DDR2 SDRAM is directly accessed through the FPGA
- Other memory options available (call factory)
- Supports dual DMA channel data transfer to the CPU/bus
- Support for Xilinx ChipScope™ Pro interface
- Designed for conduction-cooled host card or -40 to 85°C operation in air-cooled systems